A timing sequencer you reprogram like a music box — specified for humans and AI alike, proven on silicon. オルゴールのように書き換えるタイミングシーケンサ——人間とAIの双方に向けて仕様化され、実機で証明済み。
4 opcodes — Global, Stay, Branch, Jump — small enough for a human to hold in one hand, and for an AI to hold exactly. 4オペコード——Global・Stay・Branch・Jump——人間が片手で、AIが正確に保持できる大きさ。
| FG | BG | Q | |
|---|---|---|---|
| Stay | Consumes one tick | Consumes one tick | Held |
| Global · Stay Set | Leading※ | Ignored | Ignored |
33 cells of law: the normative command × phase table (Chapter 3 §3.4b) adjudicates every command in every band — down to a single clock at prescaler 1. 33セルの法: 規範のコマンド×フェーズ表(第3章§3.4b)が、全帯域の全コマンドを——プリスケーラ1の1クロックに至るまで——裁く。
Chapter 1 (design philosophy, §1.4a trailing-edge principle) → Chapter 3 §3.4b (the normative table) → CHANGES (implementation work order) → the RTL → the conformance matrix. 第1章（設計哲学、§1.4a後縁原理）→ 第3章§3.4b（規範の表）→ CHANGES（実装作業指示書）→ RTL → 適合性マトリクス。
# Key entry points — raw URLs, in reading order (see repository top README)
https://raw.githubusercontent.com/dsohnaka/PTSG-Core/main/01_Architecture/PTSG_Core_Layer1_Chapter1_Scope_and_Design_Philosophy.md
https://raw.githubusercontent.com/dsohnaka/PTSG-Core/main/01_Architecture/PTSG_Core_Layer1_Chapter3_SubOpcode_and_Background_Execution.md
https://raw.githubusercontent.com/dsohnaka/PTSG-Core/main/01_Architecture/CHANGES_Layer1_v1.1_for_ClaudeCode.md
https://raw.githubusercontent.com/dsohnaka/PTSG-Core/main/03_Sample_Implementations/ptsg_core_verilog/ptsg_core.v
https://raw.githubusercontent.com/dsohnaka/PTSG-Core/main/04_Verification_Evidence/conformance_matrix.mdImprovisation design, on camera: predictions frozen before each experiment, failures shown as they happen. From a manual LED blink to a 25 MHz divide-by-2 in two instruction words. インプロビゼーション・デザインをカメラの前で: 予言は実験前に凍結、失敗は起きたまま見せる。手動Lチカから、2命令語の25MHz二分周器まで。